
LTC2753
17
2753f
OPERATION—EXAMPLES
WR
2753 TD03
SPAN I/O
INPUT
DATA I/O
INPUT
UPD
D/S
8000H
010
READ = LOW
UPDATE
(±5V RANGE, VOUT = 0V)
WR
2753 TD04
SPAN I/O
INPUT
DATA I/O
INPUT
READ = LOW
UPD
D/S
C000H
4000H
011
UPDATE (5V)
UPDATE (–5V)
WR
2753 TD05
DATA I/O
OUTPUT
DATA I/O
INPUT
READ
UPD
D/S
8000H
0000H
HI-Z
INPUT REGISTER
DAC REGISTER
HI-Z
UPDATE (2.5V)
1. Load ±5V range with the output at 0V. Note that since span and code are updated together, the output, if started at
0V, will stay there. The 16-Bit DAC code is shown in hex for compactness.
2. Load ±10V range with the output at 5V, changing to –5V.
3. Write and update midscale code in 0V to 5V range (VOUT = 2.5V) using readback to check the contents of the input
and DAC registers before updating.